1. general description the 74hc3g04-q100; 74hct3g04-q100 is a trip le inverter. inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of v cc . this product has been qualified to the automotive electronics council (aec) standard q100 (grade at 1) and is suitable for use in automotive applications. 2. features and benefits ? automotive product qualif ication in accordance with aec-q100 (grade 1) ? specified from ? 40 ? c to +85 ? c and from ? 40 ? c to +125 ? c ? input levels: ? for 74hc3g04-q100: cmos level ? for 74hct3g04-q100: ttl level ? wide supply voltage range from 2.0 v to 6.0 v ? symmetrical output impedance ? high noise immunity ? low power dissipation ? balanced propagation delays ? multiple package options ? esd protection: ? mil-std-883, method 3015 exceeds 2000 v ? hbm jesd22-a114f exceeds 2000 v ? mm jesd22-a115-a exceeds 200 v (c = 200 pf, r = 0 ? ) 74hc3g04-q100; 74hct3g04-q100 inverter rev. 2 ? 18 november 2013 product data sheet
74hc_hct3g04_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved . product data sheet rev. 2 ? 18 november 2013 2 of 15 nxp semiconductors 74hc3g04-q100; 74hct3g04-q100 inverter 3. ordering information 4. marking [1] the pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. functional diagram table 1. ordering information type number package temperature range name description version 74HC3G04DP-Q100 ? 40 ? c to +125 ? c tssop8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm sot505-2 74hct3g04dp-q100 74hc3g04dc-q100 ? 40 ? c to +125 ? c vssop8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm sot765-1 74hct3g04dc-q100 74hc3g04gd-q100 ? 40 ? c to +125 ? c xson8 plastic extremely thin small outline package; no leads; 8 terminals; body 3 ? 2 ? 0.5 mm sot996-2 74hct3g04gd-q100 table 2. marking codes type number marking code [1] 74HC3G04DP-Q100 h04 74hct3g04dp-q100 t04 74hc3g04dc-q100 h04 74hct3g04dc-q100 t04 74hc3g04gd-q100 h04 74hct3g04gd-q100 t04 fig 1. logic symbol fig 2. iec logic symbol fig 3. logic diagram (one gate) mna720 1a 1y 17 2a 2y 35 3a 3y 62 7 1 1 1 5 3 mna721 1 2 6 mna110 a y
74hc_hct3g04_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved . product data sheet rev. 2 ? 18 november 2013 3 of 15 nxp semiconductors 74hc3g04-q100; 74hct3g04-q100 inverter 6. pinning information 6.1 pinning 6.2 pin description 7. functional description [1] h = high voltage level; l = low voltage level. fig 4. pin configuration sot505-2 (tssop8) and sot765-1 (vssop8) fig 5. pin configuration sot996-2 (xson8) + & |